oro_atomic.h
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00040 #include "../../rtt-config.h"
00041 #ifndef __ARCH_I386_ORO_ATOMIC__
00042 #define __ARCH_I386_ORO_ATOMIC__
00043
00044
00045
00046
00047
00048
00049 #ifndef CONFIG_FORCE_UP
00050 #define ORO_LOCK "lock ; "
00051 #else
00052 #define ORO_LOCK ""
00053 #endif
00054
00055
00056
00057
00058
00059
00060 typedef struct { volatile int counter; } oro_atomic_t;
00061
00062 #define ORO_ATOMIC_INIT(i) { (i) }
00063 #define ORO_ATOMIC_SETUP oro_atomic_set
00064 #define ORO_ATOMIC_CLEANUP(v)
00065
00073 #define oro_atomic_read(v) ((v)->counter)
00074
00083 #define oro_atomic_set(v,i) (((v)->counter) = (i))
00084
00093 static __inline__ void oro_atomic_add(int i, oro_atomic_t *v)
00094 {
00095 __asm__ __volatile__(
00096 ORO_LOCK "addl %1,%0"
00097 :"=m" (v->counter)
00098 :"ir" (i), "m" (v->counter));
00099 }
00100
00109 static __inline__ void oro_atomic_sub(int i, oro_atomic_t *v)
00110 {
00111 __asm__ __volatile__(
00112 ORO_LOCK "subl %1,%0"
00113 :"=m" (v->counter)
00114 :"ir" (i), "m" (v->counter));
00115 }
00116
00127 static __inline__ int oro_atomic_sub_and_test(int i, oro_atomic_t *v)
00128 {
00129 unsigned char c;
00130
00131 __asm__ __volatile__(
00132 ORO_LOCK "subl %2,%0; sete %1"
00133 :"=m" (v->counter), "=qm" (c)
00134 :"ir" (i), "m" (v->counter) : "memory");
00135 return c;
00136 }
00137
00145 static __inline__ void oro_atomic_inc(oro_atomic_t *v)
00146 {
00147 __asm__ __volatile__(
00148 ORO_LOCK "incl %0"
00149 :"=m" (v->counter)
00150 :"m" (v->counter));
00151 }
00152
00160 static __inline__ void oro_atomic_dec(oro_atomic_t *v)
00161 {
00162 __asm__ __volatile__(
00163 ORO_LOCK "decl %0"
00164 :"=m" (v->counter)
00165 :"m" (v->counter));
00166 }
00167
00177 static __inline__ int oro_atomic_dec_and_test(oro_atomic_t *v)
00178 {
00179 unsigned char c;
00180
00181 __asm__ __volatile__(
00182 ORO_LOCK "decl %0; sete %1"
00183 :"=m" (v->counter), "=qm" (c)
00184 :"m" (v->counter) : "memory");
00185 return c != 0;
00186 }
00187
00197 static __inline__ int oro_atomic_inc_and_test(oro_atomic_t *v)
00198 {
00199 unsigned char c;
00200
00201 __asm__ __volatile__(
00202 ORO_LOCK "incl %0; sete %1"
00203 :"=m" (v->counter), "=qm" (c)
00204 :"m" (v->counter) : "memory");
00205 return c != 0;
00206 }
00207
00218 static __inline__ int oro_atomic_add_negative(int i, oro_atomic_t *v)
00219 {
00220 unsigned char c;
00221
00222 __asm__ __volatile__(
00223 ORO_LOCK "addl %2,%0; sets %1"
00224 :"=m" (v->counter), "=qm" (c)
00225 :"ir" (i), "m" (v->counter) : "memory");
00226 return c;
00227 }
00228
00229
00230 #define oro_atomic_clear_mask(mask, addr) \
00231 __asm__ __volatile__(ORO_LOCK "andl %0,%1" \
00232 : : "r" (~(mask)),"m" (*addr) : "memory")
00233
00234 #define oro_atomic_set_mask(mask, addr) \
00235 __asm__ __volatile__(ORO_LOCK "orl %0,%1" \
00236 : : "r" (mask),"m" (*(addr)) : "memory")
00237
00238
00239 #define smp_mb__before_oro_atomic_dec() barrier()
00240 #define smp_mb__after_oro_atomic_dec() barrier()
00241 #define smp_mb__before_oro_atomic_inc() barrier()
00242 #define smp_mb__after_oro_atomic_inc() barrier()
00243
00244 #undef ORO_LOCK
00245 #endif